A high-speed dynamic reference single-ended ECL input-interface circuit has been fabricated for advanced ATM switching MCMs. To raise the limit on the number of I/O pins, this circuit operates with a reference signal directly generated from the input signal itself. The reference level is changed dynamically to achieve a larger noise margin for operation. Experimental results show that operation up to 3.4 Gbps with a large level margin can be attained. We deploy this circuit to the input interface LSIs of an 80-Gbps ATM switching MCM.

The benefits of ATM techniques have been widely recognized and many organizations envisage the introduction of ATM techniques into their telecommunication networks. The ATM benefits can, however, be fully exploited only after effective network resource management techniques have been developed. This paper focuses on CBR-VP management techniques. The ATM transport network architecture and VP roles are summarized. Next, the issues of VP accommodation design are described. The point is how to create a design that accommodates cell loss and cell delay jitter, both of which depend on various network parameters and conditions. For this purpose, analytical procedures based on an M/D/1 queueing model are adopted. The approximation method is shown to be very effective in practical use through computer analysis. The method guarantees conservative QOSs. Finally, the proposed method is applied to several design examples to illustrate VP management issues. The proposed method will enable ATM techniques to be introduced to our telecommunication networks by the mid-1990's.

This letter proposes a new UPC (Usage Parameter Control) method suitable for monitoring/controlling the ATM cell streams of VCs (Virtual Channels) and VPs (Virtual Paths) specified with a wide-range of traffic parameter values. The method, named the 2-phase T-X method, combines two credit window type monitoring circuits that are shifted in phase by T/2. The proposed method achieves the best of both the DB and T-X methods. Its cell mis-policing rate is very low (equivalent to that of the DB-method) while its minimal hardware requirements are equal to those of the T-X method. The proposed method ensures more effective network resource (link) utilization. As a result, the proposed method is shown to be a credible UPC technique for handling broadband VBR (Variable Bit Rate) traffic in ATM based multimedia networks.

The first global interoperability experiment of GMPLS controlled Ethernet with VLAN tag swapping between two different implementations is successfully demonstrated. High definition video streaming is realized through a newly established Layer 2 Label Switched Path (L2-LSP). The results of this experiment can be applied to designing reliable Layer 2 networks.

We have developed an experimental 5-Tb/s packet-by-packet wavelength switching system, OPTIMA-2. This paper describes its hardware architecture. OPTIMA-2 is a non-blocking 3-stage switch using optical wavelength division multiplexing (WDM) links and dynamic bandwidth-sharing. A new scheduling algorithm for variable-length packets is used for the receiver ports of WDM links and simulation results show that it can suppress short-packet delay while keeping high throughput. An implementation of the WDM link using field programable gate arrays and a compact planar lightwave circuit platform is described. Experimental results for the basic operation of optical wavelength switching are also presented.

A multicast ATM switch with a new external copy module is proposed. The copy module, called copy-trunk, has two new functions to guarantee the QoS of P-MP cells: The delay priority control function and the output-cell-spacing control function. By using the delay priority control function, copied cells with high-priority are always released earlier than those with low-priority so as to avoid increasing the delay time of real-time traffic. The output-cell-spacing control function is used to reduce the burstiness of the output traffic. The output pattern is adaptively controlled by measuring the input load. The effects of these two controls are quantitatively described. The copy-trunk allows the multicast capability of a switch to be efficiently and economically increased to satisfy future traffic volume and services.

This paper proposes a high-speed crosspoint-buffer-type ATM switch, named Scalable-Distributed -Arbitration (SDA) switch. The SDA switch employs a new arbitration scheme that allows the switch to be scalable. The SDA switch has a crosspoint buffer and a transit buffer at every crosspoint. Arbitration is executed between the crosspoint buffer and the transit buffer. The arbitration selects a cell based on delay time using a synchronous counter. The selected cell is transferred from a crosspoint buffer to the output port by way of several transit buffers. Since arbitration is executed in a distributed manner at each crosspoint and the arbitration time does not depend on the switch size, the SDA switch can be expanded to realize large throughput. Numerical results show that the SDA switch ensures fairness in terms of delay time. In addition, the maximum delay time and the required crosspoint buffer size of the SDA switch are reduced, compared with those in the conventional switch based on ring arbitration. Thus, the proposed SDA switch based on the new arbitration scheme has a simple and expandable architecture,and will be suitable for future high-speed multimedia ATM networks.

This letter studies the Peak Cell Rate (PCR) policing of ATM connections that consist of multiple cell flow components. It is shown that the conventional methods proposed for policing the aggregate flow do not use the network's resources efficiently. This letter proposes a simple and efficient UPC (Usage Parameter Control) mechanism based on a tandem leaky bucket for multi-component ATM connections. The results show that network resource requirements can be minimized, with reasonable hardware complexity.

This letter proposes ALPEN, a simple, flexible and cost effective ATM-WAN architecture that emulates multiple ATM-layer protocols at the edge nodes. Any new ATM-layer protocol can be easily implemented by modifying only the edge nodes. The transit network is simple and independent of the protocols emulated, and ALPEN has a short response time. It is very suitable for implementing multimedia ATM networks.

We propose a buffer management mechanism, called V-WFQ (Virtual Weighted Fair Queueing), for achieving an approximately fair allocation of bandwidth with a small amount of hardware in a high-speed network. The basic process for the allocation of bandwidth uses selective packet dropping that compares the measured input rate of the flow with an estimated fair share of bandwidth. Although V-WFQ is a hardware-efficient FIFO-based algorithm, it achieves almost ideal fairness in bandwidth allocation. V-WFQ can be implemented in the high-speed core routers of today's IP backbone networks to provide various high-quality services. We have investigated V-WFQ's performance in terms of fairness and link utilization through extensive simulation. The results of simulation show that V-WFQ achieves a good balance between fairness and link utilization under various simulation conditions.

Generalized Multi-protocol Label Switching (GMPLS) technologies are expected a key technology that creates high-performance Internet backbone networks. There were many GMPLS interoperability trials. However, most of them reported the successful results only. How to set up a trial network and how to test it was generally not discussed. In this paper, as a kind of tutorial, detailed GMPLS field trials in the National Institute of Information and Communications Technology (NICT) Kei-han-na Info-Communication Open Laboratory, Interoperability Working Group (WG) are reported. The interoperability WG is aiming at the leading edge GMPLS protocol based Inter-Carrier Interface that utilizes wide-bandwidth, cost-effective photonic technology to implement IP-centric managed networks. The interoperability WG is a consortium for researching the GMPLS protocol and advancing a de facto standard in this area. Its experimental results, new ideas, and protocols are submitted to standardization bodies such as the International Telecommunications Union-Telecommunication standardization sector (ITU-T), the Internet Engineering Task Force (IETF), and the Optical Internetworking Forum (OIF). This paper introduces the activities of the interoperability WG; they include a nationwide GMPLS field trial using the JGN II network with multi-vendor, multi-switching-capable equipment and a GMPLS multi routing area trial that used a multi-vendor lambda-switching-capable network.

This paper proposes a scalable active optical access network using high-speed Plumbum Lanthanum Zirconate Titanate (PLZT) optical switch/splitter. The Active Optical Network, called ActiON, using PLZT switching technology has been presented to increase the number of subscribers and the maximum transmission distance, compared to the Passive Optical Network (PON). ActiON supports the multicast slot allocation realized by running the PLZT switch elements in the splitter mode, which forces the switch to behave as an optical splitter. However, the previous ActiON creates a tradeoff between the network scalability and the power loss experienced by the optical signal to each user. It does not use the optical power efficiently because the optical power is simply divided into 0.5 to 0.5 without considering transmission distance from OLT to each ONU. The proposed network adopts PLZT switch elements in the variable splitter mode, which controls the split ratio of the optical power considering the transmission distance from OLT to each ONU, in addition to PLZT switch elements in existing two modes, the switching mode and the splitter mode. The proposed network introduces the flexible multicast slot allocation according to the transmission distance from OLT to each user and the number of required users using three modes, while keeping the advantages of ActiON, which are to support scalable and secure access services. Numerical results show that the proposed network dramatically reduces the required number of slots and supports high bandwidth efficiency services and extends the coverage of access network, compared to the previous ActiON, and the required computation time for selecting multicast users is less than 30 msec, which is acceptable for on-demand broadcast services.

This letter proposes a hierarchical label-switched path (LSP) setup scheme, called ConSet, for multi-layer generalized multi-protocol label switching (GMPLS) networks. ConSet allows a Path message to be transmitted to the downstream neighbor node without waiting for the establishment of the higher-order LSP. Confirmation of the establishment of the higher-order LSP is performed at the ingress node of the higher-order LSP before a Resv message of the lower-order LSP is transmitted to the upstream neighbor node. ConSet is able to set up hierarchical LSPs faster than the sequential scheme.

Photonic Internet Lab. (PIL) is shooting for the leading edge photonic-GMPLS (Generalized Multi-protocol Label Switching) that utilizes wide-band, cost-effective photonic technology to implement IP-centric managed networks. PIL is a consortium for researching the GMPLS protocol and advancing a de facto standard in this area. Members make leading edge GMPLS code modules and test them at the lab site. The experimental results, new ideas, and protocols are contributed to standardization bodies such as IETF and OIF. This paper also describes the world's first trial of GMPLS multi-region (multi-layer), multi-route, multi-vender signaling.

We report the first successful experiment on Point-to-Multipoint (P2MP) VLAN path establishment on the overlay-model-based GMPLS-controlled wide area Ethernet. To support the overlay model, P2MP VLAN path signaling with egress output port indication is proposed and implemented. It is confirmed that our extended RSVP-TE software can correctly establish P2MP VLAN paths in the overlay-model network.

The energy consumption of network virtualization environments (NVEs) has become a critical issue. In this paper, we focus on reducing the data switching energy consumption of NVE. We first analyze the data switching energy of NVE. Then, we propose a dynamic energy efficient virtual link resource reallocation (eEVLRR) approach for NVE. eEVLRR dynamically reallocates the energy efficient substrate resources (s-resources) for virtual links with dynamic changes of embeddable s-resources to save the data switching energy. In order to avoid traffic interruptions while reallocating, we design a cross layer application-session-based forwarding model for eEVLRR that can identify and forward each data transmission flow along the initial specified substrate data transport path until end without traffic interruptions. The results of performance evaluations show that eEVLRR not only guarantees the allocated s-resources of virtual links are continuously energy efficient to save data switching energy but also has positive impacts on virtual network acceptance rate, revenues and s-resources utilization.

This paper presents the development of high-speed logic ICs having the same function as the ECL100K family for high-speed digital system applications such as for time division switching systems. A Super-Self-Aligned process Technology (SST) and a low-voltage swing differential circuit technique are used. The ICs operate up to about 2 Gb/s under a chip power dissipation of 170 mW570 mW.

In a grid computing environment, the network characteristics such as bandwidth and latency affect the task performance. The demands for bandwidth of wide-area networks become large and it reaches more than 100 Gbps. In this article, we focus on parallel routes transmission, such as link aggregation, to realize large bandwidth network. The performance of grid computing with parallel routes transmission is evaluated on the emulated wide-area network.

This paper describes advanced ATM switching system hardware that uses a high-performance and cost-effective MCM-D module as an ATM-layer function device. The MCM-D module is fabricated on a Si-substrate using the stacking RAM technique to reduce module size. The MCM has a 4-layer Si substrate, a high-performance ASIC, 8 high-speed SRAMs, and an FPGA. By using the stacking RAM technique, MCM-D module size is reduced to 50. 8 mm 50. 8 mm. This is 40% of that (100 mm 65 mm) of a double-side mounted sub-board module with conventional packaging (QFP and SOP). The MCM-D module realizes the ATM-layer functions that require a high-performance ASIC with a high-speed (access time 20 ns) and large-capacity (1 MBytes) SRAM cache. The MCM approach is quite effective in increasing memory access speed because it realizes high-density packaging. The MCM-D module is mounted on an ATM line interface circuit, and realizes 150 Mbit/s throughput ATM-layer functions (header conversion and on-line monitoring) in an ATM switching system. In addition, advanced ATM switching system hardware technologies with sub-module structure are also described. The MCM-D module is one of the sub-modules of the system. This MCM technology and sub-module technology can be applied to advanced ATM switching systems.

We propose ATM switching nodes with a feedback rate control scheme, AREX, which does not require a large buffer space and does not deteriorate throughput even in large-scale and high-speed ATM-WANs. The goal of our study is to establish the ATM multi-protocol emulation network ALPEN, which is an ATM-WAN architecture for establishing a backbone for multimedia networks. ALPEN achieves an ATM-WAN which is robust against long propagation delays. It also provides high performance without a large buffer space in an ATM-WAN environment. In ALPEN, each transit node informs the edge nodes only its residual bandwidth ratio. The edge nodes support multiple ATM-layer services by emulating them based on the information notified by transit nodes. Our research has been directed towards achieving high performance ABR (Available Bit Rate) service in an ATM-WAN by using ALPEN. The conventional ABR service requires transit nodes to have relatively high calculation power and large buffer space to overcome the effect of the long propagation delays common in WANs. ALPEN node systems have been developed for trials with actual network traffic. ALPEN with AREX reduces the calculation load of transit nodes for ABR service. That is confirmed by the size of the DSP program created for a test system. ALPEN with AREX is, therefore, able to emulate ABR service with higher performance in ATM-WANs, because ALPEN edge nodes are able to indicate the users allowed by ER (Explicit Rate) feedback. The network throughput, maximum queue length at congestion point, and burst transmission rate are determined by simulation. ALPEN with AREX achieves better performances than the conventional ABR network.